nanoamp solutions, inc. 670 north mccarthy blvd. suite 220, milpitas, ca 95035 ph: 408-935-7777, fax: 408-935-7770 www.nanoamp.com stock no. 23205-01 11/01/02 1 the specifications of this device are subject to change wit hout notice. for latest documentation see http://www.nanoamp.com. n01m0818l1a 1mb ultra-low power asynchronous medical cmos sram 128kx8 bit overview the n01m0818l1a is an integrated memory device intended for non life-support (class 1 or 2) medical applications. this device comprises a 1 mbit static random access memory organized as 131,072 words by 8 bits. the device is designed and fabricated using nanoamp?s advanced cmos technology with reliab ility inhancements for medical users. the base design is the same as nanoamp?s n01m0818l2a, which has further reliability processing for life-support (class 3) medical applications. the device operates with two chip enable (ce1 and ce2) controls and output enable (oe ) to allow for easy memory expansion. the n01m0818l1a is optimal for various applications where low-powe r is critical such as battery backup and hand-held devices. the device can operate over a very wide temperature range of -40 o c to +85 o c and is available in jedec standard packages compatible with other standard 256kb x 8 srams features ? single wide power supply range 1.4 to 2.3 volts - stsop package ? dual power supply - die only 1.4 to 2.3 volts - vcc 1.4 to 3.6 volts - vccq ? very low standby current 200na maximum at 2.0v and 37 deg c ? very low operating current 1 ma at 2.0v and 1s (typical) ? very low page mode operating current 0.5ma at 1.0v and 1s (typical) ? simple memory control dual chip enables (ce1 and ce2) output enable (oe ) for memory expansion ? low voltage data retention vcc = 1.2v ? automatic power down to standby mode ? special processing to reduce soft error rate (ser) pin configuration product family part number package type operating temperature power supply (vcc) speed standby current (i sb ), max operating current (icc), max n01m0818l1an 32 - stsop i -40 o c to +85 o c 1.4v - 2.3v 85ns @ 1.7v 150ns @ 1.4v 20 a 2.5 ma @ 1mhz n01m0818l1ad known good die n01m0818l1a stsop 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 a11 a9 a8 a13 we ce2 a15 v cc nc a16 a14 a12 a7 a6 a5 a4 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 oe a10 ce1 i/o7 i/o6 i/o5 i/o4 i/o3 v ss i/o2 i/o1 i/o0 a0 a1 a2 a3 pin descriptions pin name pin function a 0 -a 16 address inputs we write enable input ce1 , ce2 chip enable input oe output enable input i/o 0 -i/o 7 data inputs/outputs v ccq output power (die only) v cc power v ss ground
stock no. 23205-01 11/01/02 2 the specifications of this device are subject to change wit hout notice. for latest documentation see http://www.nanoamp.com. nanoamp solutions, inc. n01m0818l1a functional block diagram functional description ce1 ce2 we oe i/o 0 - i/o 7 mode power h x x x high z standby 1 1. when the device is in standby mode, control inputs (we and oe ), address inputs and data input/outputs are internally isolated from any external influence and disabled from exerting any influence externally. standby x l x x high z standby 1 standby lhl x 2 2. when we is invoked, the oe input is internally disabled and has no effect on the circuit. data in write 2 active lhhl data out read active l h h h high z active active capacitance 1 1. these parameters are verified in device characterization and are not 100% tested item symbol test condition min max unit input capacitance c in v in = 0v, f = 1 mhz, t a = 25 o c 8pf i/o capacitance c i/o v in = 0v, f = 1 mhz, t a = 25 o c 8pf control logic page decode logic address inputs a 4 - a 16 input/ output mux and buffers i/o 0 - i/o 7 address word decode logic address address inputs a 0 - a 3 8k page x 16 word x 8 bit ram word mux ce1 ce2 we oe v ccq v cc v ss
stock no. 23205-01 11/01/02 3 the specifications of this device are subject to change wit hout notice. for latest documentation see http://www.nanoamp.com. nanoamp solutions, inc. n01m0818l1a absolute maximum ratings 1 1. stresses greater than those listed above may cause permanent dam age to the device. this is a stress rating only and functiona l operation of the device at these or any other conditions above those indicated in the operating section of this specification i s not implied. exposure to absolute maximum rating cond itions for extended periods may affect reliability. item symbol rating unit voltage on any pin relative to v ss v in,out ?0.3 to v cc +0.3 v voltage on v cc supply relative to v ss v cc ?0.3 to 4.5 v power dissipation p d 500 mw storage temperature t stg ?40 to 125 o c operating temperature t a -40 to +85 o c soldering temperature and time t solder 240 o c, 10sec(lead only) o c operating characteristics (ove r specified temperature range) item symbol test conditions min. typ 1 1. typical values are measured at vcc=vcc typ., t a =25c and not 100% tested. max unit core supply voltage v cc 1.4 1.8 2.3 v i/o supply voltage v ccq v ccq > or = v cc 1.4 1.8 3.6 v data retention voltage v dr chip disabled 3 1.2 v input high voltage v ih v ccq -0.6 v ccq +0.3 v input low voltage v il ?0.3 0.6 v output high voltage v oh i oh = 0.2ma v ccq ?0.2 v output low voltage v ol i ol = -0.2ma 0.2 v input leakage current i li v in = 0 to v cc 0.1 a output leakage current i lo oe = v ih or chip disabled 0.1 a read/write operating supply current @ 1 s cycle time 2 2. this parameter is specified with the out puts disabled to avoid external loading effect s. the user must add current required t o drive output capacitance expected in the actual system. i cc1 v cc =2.3 v, v in =v ih or v il chip enabled, i out = 0 1.5 2.5 ma read/write operating supply current @ 85 ns cycle time 2 i cc2 v cc =2.3 v, v in =v ih or v il chip enabled, i out = 0 10.0 13.0 ma page mode operating supply current @ 85 ns cycle time 2 (refer to power savings with page mode operation diagram) i cc3 v cc =2.3 v, v in =v ih or v il chip enabled, i out = 0 3.5 ma read/write quiescent operating sup- ply current 3 3. this device assumes a standby m ode if the chip is disabled (ce1 high or ce2 low). in order to achieve low standby current all inputs must be within 0.2 volts of either vcc or vss. i cc4 v cc =2.3 v, v in =v ih or v il chip enabled, i out = 0, f = 0 0.2 a standby current 3 i sb1 v in = v cc or 0v chip disabled t a = 85 o c, v cc = 2.3 v 0.2 20.0 a data retention current 3 i dr v cc = 1.8v, v in = v cc or 0 chip disabled, t a = 85 o c 0.1 1.0 a
stock no. 23205-01 11/01/02 4 the specifications of this device are subject to change wit hout notice. for latest documentation see http://www.nanoamp.com. nanoamp solutions, inc. n01m0818l1a power savings with page mode operation (we = v ih ) note: page mode operation is a method of addressing the sram to save operating current. the internal organization of the sram is optimized to allow this unique operating mode to be used as a valuable power saving feature. the only thing that needs to be done is to address the sram in a manner that the internal page is left open and 8-bit words of data are read from the open page. by treating addresses a0-a3 as the least significant bits and addressing the 16 words within the open page, power is reduced to the page mode value which is considerably lower than standard operating currents for low power srams. page address (a4 - a16) oe ce1 ce2 word address (a0 - a3) open page word 1 word 2 word 16 ...
stock no. 23205-01 11/01/02 5 the specifications of this device are subject to change wit hout notice. for latest documentation see http://www.nanoamp.com. nanoamp solutions, inc. n01m0818l1a timing test conditions item input pulse level 0.1v cc to 0.9 v cc input rise and fall time 5ns input and output timing reference levels 0.5 v cc output load cl = 30pf operating temperature -40 to +85 o c timing v ccq > or = v cc item symbol v cc = 1.4 - 2.3 v v cc = 1.7 - 2.3 v units min. max. min. max. read cycle time t rc 150 85 ns address access time t aa 150 85 ns chip enable to valid output t co 150 85 ns output enable to valid output t oe 50 40 ns chip enable to low-z output t lz 20 10 ns output enable to low-z output t olz 20 5 ns chip disable to high-z output t hz 030015ns output disable to high-z output t ohz 030015ns output hold from address change t oh 20 10 ns write cycle time t wc 150 85 ns chip enable to end of write t cw 75 50 ns address valid to end of write t aw 75 50 ns write pulse width t wp 50 40 ns address setup time t as 00ns write recovery time t wr 00ns write to high-z output t whz 30 15 ns data to write time overlap t dw 50 40 ns data hold from write time t dh 00 ns end write to low-z output t ow 10 5 ns
stock no. 23205-01 11/01/02 6 the specifications of this device are subject to change wit hout notice. for latest documentation see http://www.nanoamp.com. nanoamp solutions, inc. n01m0818l1a timing of read cycle (ce1 = oe = v il , we = ce2 = v ih ) timing waveform of read cycle (we =v ih ) address data out t rc t aa t oh data valid previous data valid address oe data valid t rc t aa t co t hz t ohz t olz t oe t lz high-z data out ce1 ce2
stock no. 23205-01 11/01/02 7 the specifications of this device are subject to change wit hout notice. for latest documentation see http://www.nanoamp.com. nanoamp solutions, inc. n01m0818l1a timing waveform of write cycle (we control) timing waveform of write cycle (ce1 control) address data in ce1 ce2 data valid t wc t aw t cw t wr t whz t dh high-z we data out high-z t ow t as t wp t dw address we data valid t wc t aw t cw t wr t dh data in high-z t as t wp t lz t dw data out t whz ce1 (for ce2 control, use inverted signal)
stock no. 23205-01 11/01/02 8 the specifications of this device are subject to change wit hout notice. for latest documentation see http://www.nanoamp.com. nanoamp solutions, inc. n01m0818l1a 32-lead stsop-i package (n32) note: 1. all dimensions in millimeters 2. package dimensions exclude molding flash 13.400.20 8.00.10 see detail b 1.100.15 11.800.10 0.27 0.17 0.50mm ref detail b 0.80mm ref 0 o -8 o 0.20 0.00
stock no. 23205-01 11/01/02 9 the specifications of this device are subject to change wit hout notice. for latest documentation see http://www.nanoamp.com. nanoamp solutions, inc. n01m0818l1a ordering information ? 2001 - 2002 nanoamp solutions, inc. all rights reserved. nanoamp solutions, inc. ("nanoamp") reserves the right to change or modify the information contained in this data sheet and the products described therein, without prior notice. nanoamp does not convey any license under its patent rights nor the rights of others. charts, drawings and schedules contained in this data sheet are provided for illustration pur- poses only and they vary depending upon specific applications. nanoamp makes no warranty or guarantee regarding suitability of these products for any particular purpose, nor does nanoamp ass ume any liability arising out of the application or use of any product or circuit described herein. nanoamp does not authorize use of its products as critical components in any application in which the failure of the nanoamp product may be expected to result in significant injury or de ath, including life support systems and critical medical instrumen ts. revision history revision # date change description 01 11/01/02 initial release n01m0818l1ax -xx x i = industrial, -40c to 85c 85 = 85ns @ 1.8v n = 32-pin stsop i d = known good die temperature performance package type
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